Compiler Runtime Environment
? The virtual address of the instruction that was the direct cause of the debug
exception, or
? The virtual address of the immediately preceding branch or jump instruction, when
the debug exception causing instruction is in a branch delay slot, and the Debug
Branch Delay ( DBD ) bit in the Debug register is set.
For asynchronous debug exceptions (debug interrupt, complex break), the DEPC
contains the virtual address of the instruction where execution should resume after the
debug handler code is executed.
No initialization is performed on this register in the PIC32MX startup code.
5.7.2.10.5 Error Exception Program Counter ( ErrorEPC – CP0 Register 30,
Select 0)
This register is a read/write register, similar to the EPC register, except that it is used on
error exceptions. All bits of the ErrorEPC are significant and must be writable. It is also
used to store the program counter on Reset, Soft Reset, and non-maskable interrupt
(NMI) exceptions. The ErrorEPC register contains the virtual address at which
instruction processing can resume after servicing an error. This address can be:
? The virtual address of the instruction that caused the exception, or
? The virtual address of the immediately preceding branch or jump instruction when
the error causing instruction is a branch delay slot.
Unlike the EPC register, there is no corresponding branch delay slot indication for the
ErrorEPC register.
No initialization is performed on this register in the PIC32MX startup code.
5.7.2.10.6 Debug Exception Save Register ( DeSave – CP0 Register 31, Select 0)
This register is a read/write register that functions as a simple memory location. This
register is used by the debug exception handler to save on of the GPRs that is then
used to save the rest of the context to a pre-determined memory area (such as in the
EJTAG Probe). This register allows the safe debugging of exception handlers and other
types of code where the existence of a valid stack for context saving cannot be
assumed.
No initialization is performed on this register in the PIC32MX startup code.
5.7.2.11
CALL “ON BOOTSTRAP” PROCEDURE
A procedure is called after initializing the CP0 registers. This procedure allows users to
perform actions during bootstrap (i.e., while Status BEV is set) and before entering into
the main routine. An empty weak version of this procedure ( _on_bootstrap ) is
provided with the startup code. This procedure may be used for performing hardware
initialization and/or for initializing the environment required by an RTOS.
5.7.2.12
CHANGE LOCATION OF EXCEPTION VECTORS
Immediately before calling the applications main routine, the Status BEV is cleared to
change the location of the exception vectors from the bootstrap location to the normal
location.
5.7.2.13
CALL MAIN
The last thing that the startup code performs is a call to the main routine. If the user
returns from main, the startup code goes into an infinite loop.
? 2007 Microchip Technology Inc.
DS51686A-page 71
相关PDF资料
SW300003-EVAL LIBRARY SOFT MODEM-EVAL ONLY
SW300010-EVAL SPEECH RECOG LIBRARY-EVAL ONLY
SW300040-EVAL LIBRARY NOISE SUPPR-EVAL ONLY
SW300060-EVAL LIBRARY ACOUSTIC ECHO-EVAL ONLY
SW300070-EVAL SOFTWARE LIBR ENC/DEC EVAL ONLY
SW500012 HI-TECH C PRO FOR PIC32
SY87701LHI-EVAL BOARD EVAL SY87701 EXPERIMENT
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